VLSI complexity reduction by piece-wise approximation of the sigmoid function

Abstract. The paper is devoted to show that there are simple and accurate ways to compute a sigmoid nonlinearity in digital hardware by piece-wise linearization. This is done as the computations involved are complex, but even more interesting, for the data compression performed by the sigmoid, which can half the number of Boolean functions to be further implemented. We detail such an approximation algorithm, and analyze its accuracy, showing improvements over the previous known algorithms. The algorithm uses only additions/subtractions and shifts (multiplications by powers of 2), supporting our claim of “simplicity”.